The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 28, 2017

Filed:

Jul. 14, 2016
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Su Xing, Singapore, SG;

Hsueh-Wen Wang, Hsinchu, TW;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/06 (2006.01); H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 21/8249 (2006.01); H01L 27/02 (2006.01); H01L 29/49 (2006.01); H01L 29/26 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0635 (2013.01); H01L 21/8249 (2013.01); H01L 27/0207 (2013.01); H01L 27/0617 (2013.01); H01L 29/0649 (2013.01); H01L 29/26 (2013.01); H01L 29/4966 (2013.01); H01L 29/66234 (2013.01); H01L 27/06 (2013.01);
Abstract

A method for fabricating semiconductor device is disclosed. First, a substrate is provided, a bipolar junction transistor (BJT) is formed on the substrate, a metal-oxide semiconductor (MOS) transistor is formed on the substrate and electrically connected to the BJT, a resistor is formed on the substrate and electrically connected to the MOS transistor, a dielectric layer is formed on the substrate to cover the BJT, the MOS transistor, and the resistor, and an oxide-semiconductor field-effect transistor (OS-FET) is formed on the dielectric layer and electrically connected to the MOS transistor and the resistor.


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