The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 28, 2017

Filed:

Aug. 17, 2015
Applicant:

Freescale Semiconductor, Inc., Austin, TX (US);

Inventors:

Weize Chen, Phoenix, AZ (US);

Hubert M. Bode, Haar, DE;

Richard J. De Souza, Chandler, AZ (US);

Patrice M. Parris, Phoenix, AZ (US);

Assignee:

NXP USA, INC., Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/06 (2006.01); H01L 29/10 (2006.01); H01L 27/02 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 29/04 (2006.01); H01L 29/16 (2006.01); H01L 29/861 (2006.01); H01L 29/872 (2006.01); H01L 29/78 (2006.01); H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0629 (2013.01); H01L 27/0288 (2013.01); H01L 29/04 (2013.01); H01L 29/0646 (2013.01); H01L 29/0649 (2013.01); H01L 29/1083 (2013.01); H01L 29/1095 (2013.01); H01L 29/16 (2013.01); H01L 29/66136 (2013.01); H01L 29/66143 (2013.01); H01L 29/66681 (2013.01); H01L 29/782 (2013.01); H01L 29/7818 (2013.01); H01L 29/861 (2013.01); H01L 29/872 (2013.01); H01L 29/0653 (2013.01); H01L 29/0696 (2013.01); H01L 29/0869 (2013.01);
Abstract

Embodiments include methods of forming a semiconductor device having a first conductivity type, an isolation structure (including a sinker region and a buried layer), an active device within area of the substrate contained by the isolation structure, and a diode circuit. The buried layer is positioned below the top substrate surface, and has a second conductivity type. The sinker region extends between the top substrate surface and the buried layer, and has the second conductivity type. The active device includes a source region of the first conductivity type, and the diode circuit is connected between the isolation structure and the source region. The diode circuit may include one or more Schottky diodes and/or PN junction diodes. In further embodiments, the diode circuit may include one or more resistive networks in series and/or parallel with the Schottky and/or PN diode(s).


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