The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9601627 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 21, 2017

Filed:

Jun. 13, 2016
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Tsung-Che Tsai, Hsin-Chu, TW;

Yi-Feng Chang, Xinbei, TW;

Jam-Wem Lee, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01); H01L 29/78 (2006.01); H01L 29/739 (2006.01); H01L 29/66 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7851 (2013.01); H01L 29/4238 (2013.01); H01L 29/66795 (2013.01); H01L 29/7391 (2013.01); H01L 29/785 (2013.01);
Abstract

An embodiment integrated circuit (e.g., diode) and method of making the same. The embodiment integrated circuit includes a well having a first doping type formed over a substrate having the first doping type, the well including a fin, a source formed over the well on a first side of the fin, the source having a second doping type, a drain formed over the well on a second side of the fin, the drain having the first doping type, and a gate oxide formed over the fin, the gate oxide laterally spaced apart from the source by a back off region of the fin. The integrated circuit is compatible with a FinFET fabrication process.


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Tsai, Tsung-Che. (2017). Diode structure compatible with finfet process (U.S. Patent No. 9601627). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9601627

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