The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 21, 2017

Filed:

Aug. 08, 2014
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd, Hsin-Chu, TW;

Inventors:

Ke-Chih Liu, Hsinchu, TW;

Chia-Ming Tsai, Zhubei, TW;

Shih-Chi Lin, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/40 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 21/768 (2006.01); H01L 29/49 (2006.01); H01L 29/51 (2006.01); H01L 29/165 (2006.01); H01L 21/285 (2006.01);
U.S. Cl.
CPC ...
H01L 29/6656 (2013.01); H01L 21/76814 (2013.01); H01L 21/76831 (2013.01); H01L 21/76832 (2013.01); H01L 21/76834 (2013.01); H01L 21/76897 (2013.01); H01L 29/665 (2013.01); H01L 29/66545 (2013.01); H01L 29/66628 (2013.01); H01L 29/66636 (2013.01); H01L 29/7848 (2013.01); H01L 21/28518 (2013.01); H01L 29/165 (2013.01); H01L 29/4966 (2013.01); H01L 29/517 (2013.01);
Abstract

A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate. The semiconductor device structure includes a gate stack positioned over the semiconductor substrate. The gate stack includes a gate dielectric layer and a gate electrode over the gate dielectric layer. The semiconductor device structure includes spacers positioned over first sidewalls of the gate stack. The spacers and the gate stack surround a recess. The semiconductor device structure includes an insulating layer formed over the semiconductor substrate and surrounding the gate stack. The semiconductor device structure includes a cap layer covering the insulating layer, the spacers, and inner walls of the recess.


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