The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 21, 2017

Filed:

May. 31, 2012
Applicants:

Aniruddha Nagendran Udipi, Austin, TX (US);

Naveen Muralimanohar, Santa Clara, CA (US);

Norman Paul Jouppi, Palo Alto, CA (US);

Alan Lynn Davis, Salt Lake City, UT (US);

Rajeev Balasubramonian, Sandy, UT (US);

Inventors:

Aniruddha Nagendran Udipi, Austin, TX (US);

Naveen Muralimanohar, Santa Clara, CA (US);

Norman Paul Jouppi, Palo Alto, CA (US);

Alan Lynn Davis, Salt Lake City, UT (US);

Rajeev Balasubramonian, Sandy, UT (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G06F 11/10 (2006.01); G11C 29/04 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1064 (2013.01); G06F 11/1012 (2013.01); G06F 11/1044 (2013.01); G06F 11/108 (2013.01); G11C 2029/0411 (2013.01);
Abstract

An example system in accordance with an aspect of the present disclosure is to use local error detection (LED) and global error correction (GEC) information to check data fidelity and correct an error. The LED is to be calculated per cache line segment of data associated with a rank of a memory. Data fidelity may be checked in response to a memory read operation, based on the LED information, to identify a presence of an error and the location of the error among cache line segments of the rank. The cache line segment having the error may be corrected based on the GEC information, in response to identifying the error.


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