The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 14, 2017

Filed:

Dec. 15, 2015
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Anthony I-Chih Chou, Beacon, NY (US);

Chengwen Pei, Danbury, CT (US);

Edward P. Maciejewski, Wappingers Falls, NY (US);

Ning Zhan, Scarsdale, NY (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/06 (2006.01); H01L 21/8234 (2006.01); H01L 21/265 (2006.01); H01L 49/02 (2006.01); H01L 29/08 (2006.01); H01L 29/45 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0629 (2013.01); H01L 21/26513 (2013.01); H01L 21/823418 (2013.01); H01L 21/823431 (2013.01); H01L 28/20 (2013.01); H01L 29/0847 (2013.01); H01L 29/456 (2013.01); H01L 29/7851 (2013.01);
Abstract

Fabrication methods and structure include: providing a wafer with at least one fin extended above a substrate in a first region, and at least one fin extended above the substrate in a second region of the wafer; forming a gate structure extending at least partially over the at least one fin to define a semiconductor device region in the first region; implanting a dopant into the at least one fin in the first region and into the at least one fin in the second region of the wafer, where the implanting of the dopant into the at least one fin of the second region modulates a physical property of the at least one fin to define a resistor device region in the second region; and disposing a conductive material at least partially over the at least one fin in the first region and over the at least one fin in the second region of the wafer, in part, to form a source and drain contact in the first region, and a fin-type metal-semiconductor resistor in the second region.


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