Methods of processing wafer-level assemblies to reduce warpage, and related assemblies

Abstract

Wafer-level methods of processing semiconductor devices may involve forming grooves partially through a molding material, the molding material located in streets and at least surrounding stacks of semiconductor dice located on a wafer. Wafer-level methods of preparing semiconductor devices may involve attaching a wafer to a carrier substrate and forming stacks of laterally spaced semiconductor dice on die locations of the wafer. Molding material may be disposed over the die stacks on a surface of the wafer to at least surround the stacks of semiconductor dice with the molding material. Grooves may be formed in the molding material by partially cutting through the molding material between at least some of the stacks of semiconductor dice along streets between the die stacks. The resulting wafer-level assembly may then, when exposed to elevated temperatures during, for example, debonding the wafer from a carrier, exhibit reduced propensity for warping.