The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 07, 2017

Filed:

Dec. 28, 2015
Applicant:

Siliconware Precision Industries Co., Ltd., Taichung, TW;

Inventors:

Yan-Heng Chen, Taichung, TW;

Yi-Feng Chang, Taichung, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 21/56 (2006.01); H01L 21/78 (2006.01); H01L 21/48 (2006.01); H01L 23/538 (2006.01);
U.S. Cl.
CPC ...
H01L 21/78 (2013.01); H01L 21/4853 (2013.01); H01L 21/563 (2013.01); H01L 21/565 (2013.01); H01L 23/3114 (2013.01); H01L 23/3128 (2013.01); H01L 23/49811 (2013.01); H01L 21/568 (2013.01); H01L 23/5389 (2013.01); H01L 2224/131 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81005 (2013.01); H01L 2224/83005 (2013.01); H01L 2224/92125 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/3511 (2013.01);
Abstract

A method for fabricating an electronic package is provided, including the steps of: providing at least a packaging structure, wherein the packaging structure has a packaging substrate having opposite first and second sides, an electronic element disposed on the first side of the packaging substrate and a plurality of conductors formed on the first side of the packaging substrate; encapsulating the packaging structure with an insulating layer, wherein the insulating layer covers the packaging substrate; and forming an RDL (Redistribution Layer) structure on the insulating layer, wherein the RDL structure is electrically connected to the conductors. Therefore, the area of the insulating layer is not required to correspond to the area of the packaging substrate, thus allowing the area of the packaging substrate to be reduced according to the practical need so as to reduce the width of the electronic package.


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