The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 07, 2017

Filed:

Dec. 18, 2015
Applicant:

Shanghai Huahong Grace Semiconductor Manufacturing Corporation, Shanghai, CN;

Inventors:

Yong Zhang, Shanghai, CN;

Jun Xiao, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G11C 16/14 (2006.01); G11C 5/14 (2006.01); G11C 16/30 (2006.01); G11C 16/28 (2006.01);
U.S. Cl.
CPC ...
G11C 16/14 (2013.01); G11C 5/145 (2013.01); G11C 5/147 (2013.01); G11C 16/0408 (2013.01); G11C 16/28 (2013.01); G11C 16/30 (2013.01);
Abstract

A circuit for erasing data includes: a high voltage generation unit, adapted for generating an erasing signal; a first control unit, adapted for modifying the erasing signal to a first conduction control signal with a decreased voltage ascending speed; a second control unit, adapted for sending a second conduction control signal based on the first conduction control signal; a lift unit, adapted for lifting an output voltage for erasing data based on the first conduction control signal; a switch unit, adapted for forming an electrical access between the high voltage generation unit and the output end of the circuit for erasing data; and a reference current generation unit, adapted for providing a bias current to the first control unit and the second control unit. Under a circumstance that erasing effect of storage units is improved, area of a chip is relatively reduced by using the circuit for erasing data.


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