The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 28, 2017
Filed:
Apr. 05, 2016
Microsemi Semiconductor Ulc, Kanata, CA;
Krste Mitric, Ottawa, CA;
Qu Gary Jin, Kanata, CA;
Guohui Situ, Stittsville, CA;
Paul H. L. M. Schram, Bergen op Zoom, NL;
Changhui Cathy Zhang, Ottawa, CA;
Richard Geiss, Kanata, CA;
Microsemi Semiconductor ULC, Kanata, Ontario, CA;
Abstract
A multi-channel phase locked loop (PLL) device has a plurality of PLL channels. Each channel includes a digitally controlled oscillator (DCO) supplying an output clock, via an output divider, to a respective output pin. A first multiplexer selects any of the PLL channels for alignment. A feedback calibration PLL is responsive to a feedback signal derived from an output clock of a selected channel at the respective output pin. A delay control module is responsive to an output of the feedback calibration PLL to adjust the phase of the output clock.