The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 28, 2017

Filed:

Nov. 12, 2014
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chi-Lin Liu, New Taipei, TW;

Shang-Chih Hsieh, Yangmei, TW;

Lee-Chung Lu, Taipei, TW;

Chang-Yu Wu, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/356 (2006.01); H03K 3/037 (2006.01); G01R 31/3185 (2006.01);
U.S. Cl.
CPC ...
H03K 3/037 (2013.01); G01R 31/318541 (2013.01); H03K 3/356104 (2013.01); H03K 3/356121 (2013.01);
Abstract

A flip-flop circuit includes a first latch, a second latch, and a trigger stage. The first latch is configured to set a first latch output signal based on a first latch input signal and a clock signal. The second latch is configured to set a second latch output signal based on a second latch input signal and the clock signal. The trigger stage is configured to generate the second latch input signal based on the first latch output signal. The trigger stage is configured to cause the second input signal to have different voltage swings based on the first latch output signal and the second latch output signal.


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