The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 28, 2017

Filed:

Dec. 14, 2015
Applicant:

Infineon Technologies Austria Ag, Villach, AT;

Inventors:

Christian Fachmann, Fuernitz, AT;

Enrique Vecino Vazquez, Munich, DE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/82 (2006.01); H01L 21/8234 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/423 (2006.01); H01L 27/118 (2006.01); H01L 29/417 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823475 (2013.01); H01L 21/823481 (2013.01); H01L 27/11803 (2013.01); H01L 29/4238 (2013.01); H01L 29/66484 (2013.01); H01L 29/7811 (2013.01); H01L 29/7831 (2013.01); H01L 29/0696 (2013.01); H01L 29/41766 (2013.01);
Abstract

A method for manufacturing a semiconductor device includes providing a semiconductor substrate having an outer rim, an active area, and an edge termination region arranged between the active area and the outer rim, and forming a plurality of switchable cells in the active area. Each of the switchable cells includes a body region, a gate electrode structure, and a source region. The active area defined by the switchable cells includes at least a first switchable region having a specific gate-drain capacitance which is different to a specific gate-drain capacitance of a second switchable region. The method further includes forming a source metallization in ohmic contact with the source regions of the switchable cells, and forming a gate metallization in ohmic contact with the gate electrode structures of the switchable cells.


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