The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 21, 2017
Filed:
Dec. 03, 2015
Applicant:
Stmicroelectronics Pte Ltd, Singapore, SG;
Inventors:
Assignee:
STMICROELECTRONICS PTE LTD, Singapore, SG;
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/12 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); H01L 23/3171 (2013.01); H01L 24/03 (2013.01); H01L 24/06 (2013.01); H01L 24/14 (2013.01); H01L 24/81 (2013.01); H01L 2224/02371 (2013.01);
Abstract
A wafer level chip scale package (WLCSP) includes a semiconductor substrate, a back end of line (BEOL) layer on the semiconductor substrate and having a peripheral edge recessed inwardly from an adjacent peripheral edge of the semiconductor substrate. A first dielectric layer is over the BEOL layer and wraps around the peripheral edge of the BEOL layer. A redistribution layer is over the first dielectric layer and a second dielectric layer is over the redistribution layer.