logo

For the Inventor, By the Inventor

The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9572256 B1

PDFFull Text
Date of Patent:
Feb. 14, 2017

Filed:

Feb. 27, 2015

Printed wiring board, method for manufacturing printed wiring board, and package-on-package

Applicant:

Ibiden Co., Ltd., Ogaki-shi, JP;

Inventors:

Kazuhiro Yoshikawa, Ogaki, JP;

Takashi Kariya, Ogaki, JP;

Assignee:

IBIDEN CO., LTD., Ogaki-shi, JP;

Attorney:

Oblon, McClelland, Maier & Neustadt, L.L.P.

Primary Examiner:

Tuan T Dinh

Int. Cl.
CPC ...
H05K 7/10 (2006.01); H05K 7/12 (2006.01); H05K 1/11 (2006.01); H01L 23/00 (2006.01); H05K 3/28 (2006.01); H05K 3/40 (2006.01); H05K 1/14 (2006.01); H05K 3/46 (2006.01); H05K 3/34 (2006.01);
U.S. Cl.
CPC ...
H05K 1/111 (2013.01); H01L 24/09 (2013.01); H05K 3/28 (2013.01); H05K 3/4007 (2013.01); H01L 2224/16225 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/181 (2013.01); H01L 2924/18161 (2013.01); H05K 1/144 (2013.01); H05K 3/3436 (2013.01); H05K 3/3452 (2013.01); H05K 3/3478 (2013.01); H05K 3/4644 (2013.01); H05K 2201/042 (2013.01); H05K 2201/068 (2013.01); H05K 2201/098 (2013.01); H05K 2201/09745 (2013.01); H05K 2201/10977 (2013.01); H05K 2201/2072 (2013.01); H05K 2203/0353 (2013.01); H05K 2203/0361 (2013.01); H05K 2203/0405 (2013.01); H05K 2203/0594 (2013.01); H05K 2203/0597 (2013.01); H05K 2203/1184 (2013.01);
Abstract

A printed wiring board includes an uppermost insulating layer, first pads positioned to mount an IC chip on the insulating layer, second pads positioned to mount a second printed wiring board on the insulating layer, metal posts formed on the second pads, respectively, such that the metal posts mount the second board over the chip, and a solder resist layer formed on the uppermost insulating layer and having first and second openings such that the first openings exposes the first pads and that the second openings exposes the second pads, respectively. The metal posts are formed such that each of the metal posts has a diameter which is smaller than a diameter of each of the second opening portions, and the second opening portions are formed such that the diameter of each of the second opening portions is smaller than a diameter of each of the second pads.

Find Patent Forward Citations

Loading…