The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 14, 2017

Filed:

Apr. 30, 2015
Applicant:

Ixys Corporation, Milpitas, CA (US);

Inventor:

Leonid A. Neyman, Sunnyvale, CA (US);

Assignee:

IXYS Corporation, Milpitas, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H02J 7/00 (2006.01); H02M 7/217 (2006.01);
U.S. Cl.
CPC ...
H02M 7/217 (2013.01);
Abstract

Within a non-isolated and efficient AC-to-DC power supply circuit: 1) a dep-FET is turned off to decouple an output voltage Vnode from a Vnode when a rectifier output signal Von the Vnode is greater than a first predetermined voltage Vand, 2) the dep-FET is enabled to be turned on so that a constant charging current flows from the Vnode and onto the Vnode when Vis less than V(provided that Vis less than a second predetermined voltage Vand provided that Vis adequately greater than V). To speed turn off and on of the dep-FET, gate charge of the dep-FET is removed and is stored in a second capacitor when the dep-FET is to be turned off, and charge from the second capacitor is moved back onto the gate of the dep-FET when the dep-FET is to be turned on.


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