The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 14, 2017

Filed:

May. 28, 2015
Applicants:

Eun-jung Kim, Daegu, KR;

Se-myeong Jang, Anyang-si, KR;

Dae-ik Kim, Hwaseong-si, KR;

Je-min Park, Suwon-si, KR;

Yoo-sang Hwang, Suwon-si, KR;

Inventors:

Eun-Jung Kim, Daegu, KR;

Se-Myeong Jang, Anyang-si, KR;

Dae-Ik Kim, Hwaseong-si, KR;

Je-Min Park, Suwon-si, KR;

Yoo-Sang Hwang, Suwon-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/82 (2006.01); H01L 27/22 (2006.01); H01L 29/78 (2006.01); H01L 43/08 (2006.01);
U.S. Cl.
CPC ...
H01L 27/228 (2013.01); H01L 29/7827 (2013.01); H01L 43/08 (2013.01);
Abstract

An MRAM device may include semiconductor structures, a common source region, a drain region, a channel region, gate structures, word line structures, MTJ structures, and bit line structures arranged on a substrate. Each of the semiconductor structures may include a first semiconductor pattern having a substantially linear shape extending in a first direction that is substantially parallel to a top surface of the substrate, and a plurality of second patterns that each extend in a third direction substantially perpendicular to the top surface of the substrate. A common source region and drain region may be formed in each of the semiconductor structures to be spaced apart from each other in the third direction, and the channel region may be arranged between the common source region and the drain region. Gate structures may be formed between adjacent second semiconductor patterns in the second direction. Word line structures may electrically connect gate structures arranged in the first direction to each other. MTJ structures may be electrically connected to corresponding ones of the second semiconductor patterns. Each bit line structure may electrically connect two adjacent MTJ structures in the first direction to each other.


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