The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 14, 2017

Filed:

Jan. 20, 2014
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Ming Cai, Hopewell Junction, NY (US);

Dechao Guo, Fishkill, NY (US);

Chun-Chen Yeh, Clifton Park, NY (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 29/06 (2006.01); H01L 21/84 (2006.01); H01L 29/78 (2006.01); H01L 27/13 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1203 (2013.01); H01L 21/84 (2013.01); H01L 27/13 (2013.01);
Abstract

Techniques for fabricating passive devices in an extremely-thin silicon-on-insulator (ETSOI) wafer are provided. In one aspect, a method for fabricating one or more passive devices in an ETSOI wafer is provided. The method includes the following steps. The ETSOI wafer having a substrate and an ETSOI layer separated from the substrate by a buried oxide (BOX) is provided. The ETSOI layer is coated with a protective layer. At least one trench is formed that extends through the protective layer, the ETSOI layer and the BOX, and wherein a portion of the substrate is exposed within the trench. Spacers are formed lining sidewalls of the trench. Epitaxial silicon templated from the substrate is grown in the trench. The protective layer is removed from the ETSOI layer. The passive devices are formed in the epitaxial silicon.


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