The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 14, 2017

Filed:

Jul. 14, 2015
Applicant:

Globalfoundries, Inc., Grand Cayman, KY;

Inventors:

Shishir Ray, Clifton Park, NY (US);

Sandeep Gaan, Clifton Park, NY (US);

Sheldon Meyers, Clifton Park, NY (US);

Nisha Pillai, Malta, NY (US);

Edmund Kenneth Banghart, Pittsford, NY (US);

Kyle Jung, Saratoga Springs, NY (US);

Assignee:

GLOBALFOUNDRIES, INC., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G03F 7/26 (2006.01); H01L 21/02 (2006.01); H01L 29/16 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02356 (2013.01); H01L 21/0234 (2013.01); H01L 21/02118 (2013.01); H01L 21/02345 (2013.01); H01L 21/02592 (2013.01); H01L 21/02675 (2013.01); H01L 29/1604 (2013.01);
Abstract

Semiconductor substrates and methods for processing semiconductor substrates are provided. A method for processing a semiconductor substrate includes providing a semiconductor substrate having an outer edge, a central region, and a peripheral region between the outer edge and the central region. The semiconductor substrate also has an upper surface. The method includes forming an amorphous material over the upper surface of the semiconductor substrate in the peripheral region. Also, the method includes irradiating the upper surface of the semiconductor substrate, wherein the amorphous material inhibits cracking at the outer edge of the semiconductor substrate.


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