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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9565754 B1

PDFFull Text
Date of Patent:
Feb. 07, 2017

Filed:

Dec. 12, 2012

Solder-mounted board, production method therefor, and semiconductor device

Applicant:

San-ei Kagaku Co., Ltd., Tokyo, JP;

Inventor:

Kazunori Kitamura, Saitama, JP;

Assignee:

SAN-EI KAGAKU CO., LTD., Tokyo, JP;

Attorney:

Young & Thompson

Primary Examiner:

Tremesha S Willis

Int. Cl.
CPC ...
H05K 1/16 (2006.01); H05K 1/02 (2006.01); H05K 3/00 (2006.01); H05K 3/34 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H05K 1/18 (2006.01); H05K 3/30 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0296 (2013.01); H01L 23/49894 (2013.01); H01L 24/81 (2013.01); H05K 3/00 (2013.01); H05K 3/3436 (2013.01); H05K 3/3452 (2013.01); H01L 2224/131 (2013.01); H01L 2224/16237 (2013.01); H01L 2224/293 (2013.01); H01L 2224/2929 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81191 (2013.01); H01L 2224/81193 (2013.01); H01L 2224/81815 (2013.01); H01L 2224/83104 (2013.01); H01L 2224/83192 (2013.01); H01L 2924/12042 (2013.01); H05K 1/181 (2013.01); H05K 3/305 (2013.01); H05K 3/3442 (2013.01); H05K 3/3484 (2013.01); H05K 2201/099 (2013.01); H05K 2201/0989 (2013.01); H05K 2201/10674 (2013.01); H05K 2201/10977 (2013.01); H05K 2203/0588 (2013.01); Y02P 70/613 (2015.11); Y10T 156/10 (2015.01);
Abstract

The present invention provides a solder-mounted board which realizes reliable mounting of a component thereon; a method for producing the board; and a semiconductor device. The solder-mounted board includes a substrate; a wiring layer; a solder pad for mounting a component by the mediation of the solder; and an insulating layer which covers the wiring layer such that at least the solder pad is exposed, the wiring layer, the solder pad, and the insulating layer being provided on at least one surface of the substrate, wherein the insulating layer is formed of a first insulating layer provided on the substrate and the wiring layer, and a second insulating layer provided on at least a portion of the first insulating layer.

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