The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 31, 2017
Filed:
Oct. 23, 2014
Lattice Semiconductor Corporation, Portland, OR (US);
Kexin Luo, Shanghai, CN;
Yan Rui, Shanghai, CN;
Shaoyong Lu, Shanghai, CN;
Rui Yin, Shanghai, CN;
Yu Shen, Shanghai, CN;
Lattice Semiconductor Corporation, Portland, OR (US);
Abstract
Embodiments relate to type-I PLLs that do not lock at a sub-harmonic frequency of a reference clock signal by controlling timing of charging or discharging of one or more capacitors in the PLLs. A phase frequency detector (PFD) of a type-I PLL can prevent sub-harmonic locking by generating a clear output signal to cause a sampling capacitor of PLL's loop filter to discharge only during a time period when the sampling capacitor is not being charged. For example, the PFD can include a gating element to control the time during which the clear output signal is generated. By ensuring that the sampling capacitor is not discharged during a time period while it is being charged, the PLL's voltage-controlled oscillator is controlled to oscillate at an intended frequency rather than at a sub-harmonic of the intended frequency.