The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 31, 2017
Filed:
Jan. 30, 2015
Globalfoundries Inc., Grand Cayman, KY;
Shishir Ray, Clifton Park, NY (US);
Bharat Krishnan, Mechanicville, NY (US);
Min-hwa Chi, Malta, NY (US);
GLOBALFOUNDRIES INC., Grand Cayman, KY;
Abstract
Methods are providing for fabricating transistors having at least one source region or drain region with a stressed portion. The methods include: forming, within a cavity of a substrate structure, the at least one source region or drain region with the internal stress; and resurfacing the at least one source region or drain region to reduce surface defects of the at least one source region or drain region without relaxing the stressed portion thereof. For instance, the resurfacing can include melting an upper portion of the at least one source region or drain region. In addition, the resurfacing can include re-crystallizing an upper portion of the at least one source region or drain region, and/or providing the at least one source region or drain region with at least one {111} surface.