The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 24, 2017
Filed:
Dec. 09, 2014
Intel Corporation, Santa Clara, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Apparatuses, methods and storage medium associated with automatic SATA receiver equalization margin determination and setting, are disclosed. In embodiments, an apparatus may comprise a BIOS configured to determine, during POST, whether a device is attached to one of the SATA ports, and on determination that a device is attached to one of the SATA ports, further determine whether a receiver equalization margin has been set for the device. Additionally, the BIOS may be configured to perform a DTLE training to dynamically determine and set the receiver equalization margin for the device, on determination that a receiver equalization margin has not been set for the device. Other embodiments may be described and/or claimed.