The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 24, 2017

Filed:

Sep. 27, 2013
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Igor Ermolaev, Nizhny Novgorod, RU;

Bret L. Toll, Hillsboro, OR (US);

Robert Valentine, Kiryat Tivon, IL;

Jesus Corbal San Adrian, Barcelona, ES;

Gautam B. Doshi, Bangalore, IN;

Rama Kishan V. Malladi, Bangalore, IN;

Prasenjit Chakraborty, Bangalore, IN;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/80 (2006.01); G06F 9/302 (2006.01); G06F 9/305 (2006.01); G06F 9/312 (2006.01); G06F 9/315 (2006.01); G06F 9/30 (2006.01); G06F 9/38 (2006.01);
U.S. Cl.
CPC ...
G06F 9/30036 (2013.01); G06F 9/3004 (2013.01); G06F 9/30043 (2013.01); G06F 9/30032 (2013.01); G06F 9/30047 (2013.01); G06F 9/3887 (2013.01); G06F 15/8007 (2013.01); G06F 2212/454 (2013.01);
Abstract

A processor including a decode unit to receive a vector indexed load plus arithmetic and/or logical (A/L) operation plus store instruction. The instruction is to indicate a source packed memory indices operand that is to have a plurality of packed memory indices. The instruction is also to indicate a source packed data operand that is to have a plurality of packed data elements. The processor also includes an execution unit coupled with the decode unit. The execution unit, in response to the instruction, is to load a plurality of data elements from memory locations corresponding to the plurality of packed memory indices, perform A/L operations on the plurality of packed data elements of the source packed data operand and the loaded plurality of data elements, and store a plurality of result data elements in the memory locations corresponding to the plurality of packed memory indices.


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