The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 24, 2017
Filed:
Sep. 27, 2012
Applicants:
Rajeev Muralidhar, Bangalore, IN;
Harinarayanan Seshadri, Bangalore, IN;
Vishwesh M. Rudramuni, Bangalore, IN;
Inventors:
Rajeev Muralidhar, Bangalore, IN;
Harinarayanan Seshadri, Bangalore, IN;
Vishwesh M. Rudramuni, Bangalore, IN;
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2006.01); G06F 9/44 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3206 (2013.01); G06F 1/3287 (2013.01); G06F 9/4405 (2013.01); Y02B 60/1282 (2013.01);
Abstract
Methods and apparatus relating to constrained boot techniques in multi-core platforms are described. In one embodiment, a processor may include logic that controls which specific core(s) are to be powered up/down and/or which power state these core(s) need to enter based, at least in part, on input from OS and/or software application(s). Other embodiments are also claimed and disclosed.