The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 17, 2017
Filed:
Feb. 02, 2015
United Microelectronics Corp., Hsin-Chu, TW;
Chia-Lin Lu, Taoyuan, TW;
Chun-Lung Chen, Tainan, TW;
Feng-Yi Chang, Tainan, TW;
Ching-Wen Hung, Tainan, TW;
Jia-Rong Wu, Kaoshsiung, TW;
Yi-Hui Lee, Taipei, TW;
Yi-Kuan Wu, Kaohsiung, TW;
Ying-Cheng Liu, Tainan, TW;
Chih-Sen Huang, Tainan, TW;
Yi-Wei Chen, Taichung, TW;
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Abstract
A gate structure is first formed on a substrate and an interlayer dielectric (ILD) layer is formed around the gate structure, a dielectric layer is formed on the ILD layer and the gate structure, an opening is formed in the dielectric layer and the ILD layer, and an organic dielectric layer (ODL) is formed on the dielectric layer and in the opening. After removing part of the ODL, part of the dielectric layer to extend the opening, and then the remaining ODL, a contact plug is formed in the opening.