The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 17, 2017
Filed:
Sep. 27, 2013
Robert C. Swanson, Olympia, WA (US);
Robert W. Cone, Portland, OR (US);
William J. O'sullivan, Hillsboro, OR (US);
Mariusz Oriol, Gdynia, PL;
Pawel Szymanski, Gdansk, PL;
Babak Nikjou, Tempe, AZ (US);
Madhusudhan Rangarajan, Round Rock, TX (US);
Janusz Jurski, Hillsboro, OR (US);
Piotr Kwidzinski, Folsom, CA (US);
Mariusz Stepka, Gdansk, PL;
Piotr Sawicki, Gdansk, PL;
Robert C. Swanson, Olympia, WA (US);
Robert W. Cone, Portland, OR (US);
William J. O'Sullivan, Hillsboro, OR (US);
Mariusz Oriol, Gdynia, PL;
Pawel Szymanski, Gdansk, PL;
Babak Nikjou, Tempe, AZ (US);
Madhusudhan Rangarajan, Round Rock, TX (US);
Janusz Jurski, Hillsboro, OR (US);
Piotr Kwidzinski, Folsom, CA (US);
Mariusz Stepka, Gdansk, PL;
Piotr Sawicki, Gdansk, PL;
Intel Corporation, Santa Clara, CA (US);
Abstract
Technologies for facilitating inter-system-on-a-chip (SoC) communication include a first SoC, a second SoC, and a dedicated manageability controller network. The first SoC includes a first main processor, a first manageability controller, and a memory dedicated to the first manageability controller and having manageability controller firmware stored thereon. The first manageability controller is different from the first main processor and to control functions of the first SoC. The second SoC is different from the first SoC and includes a second main processor and a second manageability control, which is different from the second main processor and to control functions of the second SoC. The second SoC is to access the manageability controller firmware of the memory of the first SoC over the dedicated manageability network.