The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 10, 2017

Filed:

Jun. 10, 2014
Applicant:

Power Integrations, Inc., San Jose, CA (US);

Inventors:

Arthur B. Odell, Morgan Hill, CA (US);

Leif Lund, San Jose, CA (US);

Sujit Banerjee, San Jose, CA (US);

Assignee:

Power Integrations, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 1/32 (2007.01); H02M 3/335 (2006.01); H03K 17/082 (2006.01); H03K 17/16 (2006.01); H03K 17/284 (2006.01); H02M 1/00 (2006.01);
U.S. Cl.
CPC ...
H02M 1/32 (2013.01); H02M 3/33515 (2013.01); H03K 17/0822 (2013.01); H03K 17/165 (2013.01); H03K 17/284 (2013.01); H02M 3/335 (2013.01); H02M 2001/0045 (2013.01);
Abstract

A Safe Operating Area (SOA) adaptive gate driver for a switch mode power converter is disclosed. In response to a detection of a fault condition, the SOA adaptive gate driver may limit the peak current in a power transistor (e.g., power MOSFET) of the power converter by limiting the voltage applied to the gate of the power MOSFET or by limiting the current injected into the gate of the power MOSFET. The limited gate voltage or current may increase the margin between an SOA border and the turn-off locus of the drain voltage and current (Vand I) to ensure safe operation of the switch mode power converter during the fault condition.


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