The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 10, 2017
Filed:
Jun. 08, 2015
Applicant:
United Microelectronics Corp., Hsin-Chu, TW;
Inventor:
Ching-Hung Kao, Hsinchu County, TW;
Assignee:
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/78 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 21/762 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 21/265 (2006.01); H01L 21/306 (2006.01); H01L 21/308 (2006.01); H01L 21/3105 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76283 (2013.01); H01L 21/2652 (2013.01); H01L 21/308 (2013.01); H01L 21/30604 (2013.01); H01L 21/31055 (2013.01); H01L 29/0653 (2013.01); H01L 29/0878 (2013.01); H01L 29/66689 (2013.01); H01L 29/7816 (2013.01);
Abstract
A method of fabricating a semiconductor device is disclosed. The method includes the steps of: providing a semiconductor substrate; forming a buried layer in the semiconductor substrate; forming a deep well having a first conductivity type in the semiconductor substrate, wherein the deep well is disposed on the buried layer; forming a first trench structure in the deep well, wherein the first trench structure extends into the buried layer; and forming a second trench structure in the semiconductor substrate, wherein a depth of the second trench structure is larger than a depth of the buried layer.