The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 10, 2017

Filed:

Nov. 07, 2013
Applicants:

Stmicroelectronics International N.v., Amsterdam, NL;

Stmicroelectronics S.r.l., Agrate Brainza, IT;

Inventors:

Abhishek Jain, Delhi, IN;

Andrea Mario Veggetti, Agrate Brianza, IT;

Amit Chhabra, Delhi, IN;

Assignees:

STMicroelectronics International N.V., Amsterdam, NL;

STMicroelectronics S.R.L., Agrate Brianza (MB), IT;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 29/48 (2006.01); G06F 1/08 (2006.01); G11C 29/24 (2006.01); G11C 29/52 (2006.01); G11C 29/54 (2006.01);
U.S. Cl.
CPC ...
G11C 29/48 (2013.01); G06F 1/08 (2013.01); G11C 29/24 (2013.01); G11C 29/52 (2013.01);
Abstract

According to an embodiment described herein, a method for testing a memory includes receiving an address and a start signal at a memory, and generating a first detector pulse at a test circuit in response to the start signal. The first detector pulse has a leading edge and a trailing edge. A data transition of a bit associated with the address is detected. The bit is a functional bit. The method further includes determining whether the bit is a weak bit by determining whether the data transition occurred after the trailing edge.


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