The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 10, 2017

Filed:

Sep. 22, 2014
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Tal Kuzi, Tel Aviv, IL;

Nadav Shulman, Tel Mond, IL;

Ofer J. Nathan, Kiryat Yam, IL;

Ori Levy, Tel Aviv, IL;

Itai Feit, Herzeliya, IL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/14 (2006.01); G06F 11/16 (2006.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06F 1/14 (2013.01); G06F 9/50 (2013.01); G06F 11/1658 (2013.01); G06F 2201/835 (2013.01);
Abstract

In an embodiment, a processor includes a master counter to store a time stamp count for the processor, and multiple cores each including a core counter to store core time stamp counts. The processor also includes synchronization logic to, in response to a de-synchronization event in a core: obtain a value of the master counter; initiate a first core counter using the value of the master counter, where the first core counter is included in the first core; compare a synchronization digit of the first core counter to a synchronization signal indicating a value of a synchronization digit of the master counter; and in response to a determination that the synchronization digit does not match the synchronization signal, adjust a first subset of digits of the first core counter based on a latency value of the synchronization signal. Other embodiments are described and claimed.


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