The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 03, 2017
Filed:
May. 12, 2011
Applicants:
Sean R. Atsatt, Sana Cruz, CA (US);
Kent Orthner, Santa Cruz, CA (US);
Daniel R. Mansur, Emerald Hills, CA (US);
Inventors:
Sean R. Atsatt, Sana Cruz, CA (US);
Kent Orthner, Santa Cruz, CA (US);
Daniel R. Mansur, Emerald Hills, CA (US);
Assignee:
Altera Corporation, San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/0175 (2006.01); H03K 19/177 (2006.01);
U.S. Cl.
CPC ...
H03K 19/017581 (2013.01);
Abstract
An field programmable gate array (FPGA) includes a circuit implemented using the FPGA fabric. The FPGA further includes another circuit implemented as hardened circuitry. The FPGA also includes a configurable interface circuit that is adapted to couple together the two circuits.