The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 03, 2017

Filed:

Jun. 30, 2014
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Bharani Thiruvengadam, Beaverton, OR (US);

Christopher Nelson, Gilbert, AZ (US);

Assignee:

INTEL CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/30 (2006.01); G01R 31/317 (2006.01);
U.S. Cl.
CPC ...
G01R 31/31715 (2013.01); G01R 31/3171 (2013.01);
Abstract

Testing I/O (input/output) eye width for an interface with an inverted modulated strobe or clock signal. An I/O interface includes multiple signal lines, each with a hardware I/O buffer with timing characteristics. A system generates a strobe signal with a triggering edge that triggers a write, and a trailing edge that is modulated by adjusting the duty cycle of the strobe signal. The system inverts the modulated strobe signal to generate an inverted strobe signal, wherein the inverted strobe signal has a modulated triggering edge generated from inverting the modulated trailing edge. The device under test writes test data based on the triggering edge of the original strobe signal and reads test data based on the triggering edge of the inverted strobe signal.


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