The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 27, 2016
Filed:
Oct. 24, 2012
Applicant:
Haesung Ds Co., Ltd., Changwon-Si, KR;
Inventors:
Sang-min Lee, Changwon, KR;
Soon-Chul Kwon, Changwon, KR;
Assignee:
HAESUNG DS CO., LTD., Changwon-si, KR;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 3/10 (2006.01); H05K 3/46 (2006.01); H05K 1/02 (2006.01); H05K 3/00 (2006.01);
U.S. Cl.
CPC ...
H05K 3/4644 (2013.01); H05K 3/4652 (2013.01); H05K 1/0271 (2013.01); H05K 3/0097 (2013.01); H05K 2201/029 (2013.01); H05K 2201/09136 (2013.01); H05K 2203/0554 (2013.01); H05K 2203/1461 (2013.01); Y10T 29/49126 (2015.01); Y10T 29/49155 (2015.01); Y10T 29/49165 (2015.01);
Abstract
A method of manufacturing a multi-layer circuit board includes: forming a first circuit layer on a first surface of a first prepreg; stacking a second prepreg on a first surface of the first circuit layer; and forming at least one of a second or a third circuit layer on at least one of a first surface of the second prepreg and a second surface opposite of the first surface of the first prepreg, wherein, in the stacking of the first prepreg, the first prepreg and the second prepreg are semi-cured.