The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2016

Filed:

Aug. 16, 2014
Applicant:

Hitachi Power Semiconductor Device, Ltd., Hitachi-shi, Ibaraki, JP;

Inventors:

Hironobu Honda, Tokyo, JP;

Fumiaki Yamashita, Tokyo, JP;

Junichi Aizawa, Tokyo, JP;

Assignee:

Hitachi Power Semiconductor Device, Ltd., Hitachi-shi, Ibaraki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/10 (2006.01); A61B 8/00 (2006.01); H03K 17/687 (2006.01); H03K 17/06 (2006.01); H03K 17/082 (2006.01);
U.S. Cl.
CPC ...
H03K 17/102 (2013.01); A61B 8/4444 (2013.01); H03K 17/063 (2013.01); H03K 17/0822 (2013.01); H03K 17/6871 (2013.01); H03K 17/6874 (2013.01); H03K 2017/066 (2013.01); H03K 2217/0009 (2013.01); H03K 2217/0054 (2013.01);
Abstract

A semiconductor switch circuit comprises: a first switch pair including two MOSFETs having gates connected one another and sources connected to one another, and a zener diode reversely connected between the gates and sources of the MOSFETs; a second switch pair including two MOSFETs having gates connected one another and sources connected to one another, and a zener diode reversely connected between the gates and sources of the MOSFETs; and a third switch pair comprising two MOSFETs having gates connected to one another and sources connected to one another. The first switch pair and the second switch pair are connected in series between two input/output terminals through a connecting node. The third switch pair is connected to the connecting node between the first switch pair and the second switch pair.


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