The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2016

Filed:

Jul. 07, 2015
Applicant:

Kabushiki Kaisha Toshiba, Minato-ku, Tokyo, JP;

Inventors:

Masamichi Suzuki, Tokyo, JP;

Yusuke Higashi, Kanagawa, JP;

Riichiro Takaishi, Kanagawa, JP;

Mitsuhiro Tomita, Tokyo, JP;

Kiwamu Sakuma, Mie, JP;

Yuichiro Mitani, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/788 (2006.01); H01L 29/68 (2006.01); H01L 29/49 (2006.01); H01L 29/423 (2006.01); H01L 21/28 (2006.01); H01L 27/115 (2006.01); H01L 23/485 (2006.01);
U.S. Cl.
CPC ...
H01L 29/4925 (2013.01); H01L 21/28273 (2013.01); H01L 27/11541 (2013.01); H01L 29/42324 (2013.01); H01L 29/7885 (2013.01); H01L 23/485 (2013.01); H01L 2924/0002 (2013.01);
Abstract

This semiconductor device comprises: a gate insulating film provided on a surface of a channel layer; a gate electrode provided on an upper surface of the gate insulating film; and a diffusion layer provided in the channel layer. Furthermore, this semiconductor device comprises: a polycrystalline silicon film provided so as to cover a surface of the gate electrode and the diffusion layer; and an inter-layer insulating film provided so as to cover the gate electrode and the polycrystalline silicon film.


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