The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2016

Filed:

Feb. 19, 2016
Applicant:

Globalfoundries Inc., Grand Cayman, KY (US);

Inventors:

Sriram Balasubramanian, Santa Clara, CA (US);

Vivek Joshi, San Jose, CA (US);

Randy W. Mann, Milton, NY (US);

Ratheesh Ramachandran Thankalekshmi, Clifton Park, NY (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 29/50 (2006.01); G11C 11/419 (2006.01); G11C 29/44 (2006.01);
U.S. Cl.
CPC ...
G11C 11/419 (2013.01); G11C 29/44 (2013.01); G11C 29/50 (2013.01);
Abstract

At least one method, apparatus and system disclosed involves testing a dual port memory cell in a memory device. A semiconductor wafer is processed for providing a dual port memory device. An inline DC contention margin test is performed for testing a contention margin related to a write operation into a cell of the memory device. A determination is made as to whether the contention margin is within a predetermined range. A responsive action is performed in response to determining that the contention margin is outside the predetermined range.


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