The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 27, 2016
Filed:
Jun. 29, 2012
Jason B. Akers, Hillsboro, OR (US);
Knut S. Grimsrud, Forest Grove, OR (US);
Robert J. Royer, Jr., Portland, OR (US);
Richard P. Mangold, Forest Grove, OR (US);
Sanjeev Trika, Portland, OR (US);
Jason B. Akers, Hillsboro, OR (US);
Knut S. Grimsrud, Forest Grove, OR (US);
Robert J. Royer, Jr., Portland, OR (US);
Richard P. Mangold, Forest Grove, OR (US);
Sanjeev Trika, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Techniques to utilize a very low power state with a memory subsystem that includes one or more non-volatile memory devices and a volatile memory system. A memory controller is coupled with the one or more non-volatile memory devices and the volatile memory system. The memory controller comprising at least an embedded control agent and memory locations to store state information. The memory controller to selectively enable and disable the one or more non-volatile memory devices. The memory controller transfers the state information to the volatile memory system prior to entering a low power state. Control circuitry is coupled with the memory controller. The control circuitry to selectively enable and disable operation of the memory controller.