The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2016

Filed:

Feb. 26, 2014
Applicants:

Nir Atzmon, Netanya, IL;

Ron-michael Bar, Ramat Hasharon, IL;

Eran Glickman, Rishon Le Zion, IL;

Benny Michalovich, Austin, TX (US);

Inventors:

Nir Atzmon, Netanya, IL;

Ron-Michael Bar, Ramat Hasharon, IL;

Eran Glickman, Rishon Le Zion, IL;

Benny Michalovich, Austin, TX (US);

Assignee:

NXP USA, INC., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/16 (2006.01); G06F 13/38 (2006.01); G06F 13/32 (2006.01);
U.S. Cl.
CPC ...
G06F 13/1673 (2013.01); G06F 13/32 (2013.01);
Abstract

A system on chip, SoC, comprising two or more data sources, a memory unit, a memory control unit, and a processing unit. Each of the data sources is capable of providing a data stream. The memory control unit is arranged to maintain, for each of the data streams, a buffer in the memory unit and to route the respective data stream to the processing unit via the respective buffer. Each of the buffers has buffer characteristics which are variable and which comprise at least the amount of free memory of the respective buffer. The memory control unit is arranged to allocate and de-allocate memory regions to and from each of the buffers in dependence of the buffer characteristics of the respective buffer, thereby allowing for re-allocation of memory of the memory unit among the buffers. A method of operating a system on chip is also described.


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