The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 27, 2016
Filed:
Nov. 04, 2015
Applicant:
Micron Technology, Inc., Boise, ID (US);
Inventors:
Giulio Albini, Boise, ID (US);
Emanuele Confalonieri, Lesmo, IT;
Assignee:
Micron Technology, Inc., Boise, ID (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/14 (2006.01); G06F 3/06 (2006.01); G06F 12/00 (2006.01); G06F 13/40 (2006.01); G06F 13/42 (2006.01); G06F 13/16 (2006.01);
U.S. Cl.
CPC ...
G06F 12/1466 (2013.01); G06F 3/0622 (2013.01); G06F 3/0637 (2013.01); G06F 3/0673 (2013.01); G06F 3/0679 (2013.01); G06F 12/00 (2013.01); G06F 12/14 (2013.01); G06F 13/1668 (2013.01); G06F 13/4036 (2013.01); G06F 13/4221 (2013.01); G06F 2212/1052 (2013.01);
Abstract
Subject matter disclosed herein relates to an apparatus comprising memory and a controller, such as a controller which determines block locking states in association with operative transitions between two or more interfaces that share at least one block of memory. The apparatus may support single channel or multi-channel memory access, write protection state logic, or various interface priority schemes.