The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2016

Filed:

Mar. 26, 2014
Applicants:

Alexander Gendler, Kiriat Motzkin, IL;

Gilad Cohen, Haifa, IL;

Inventors:

Alexander Gendler, Kiriat Motzkin, IL;

Gilad Cohen, Haifa, IL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/00 (2006.01); H03M 13/29 (2006.01); G06F 11/10 (2006.01); H03M 13/13 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1008 (2013.01); H03M 13/13 (2013.01);
Abstract

Double consecutive error correction is described. An integrated circuit with double consecutive error correction logic includes a data storage structure operative to store a set of data and a first error correction code that corresponds to the set of data. The set of data includes multiple data bits. The first error correction code was generated using a generator matrix having multiple bit groups, each bit group including a unique set of bit positions. The integrated circuit also includes an error correction code generator operative to generate, using the generator matrix, a second error correction code that corresponds to the set of data. The integrated circuit further includes a comparator operative to generate a comparison result of the first error correction code and the second error correction code. The integrated circuit includes a data corrector operative to correct two consecutive data bits of the set of data.


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