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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9523158 B1

PDFFull Text
Expired
Date of Patent:
Dec. 20, 2016

Filed:

Jan. 27, 2015

Methods and apparatus for forming semiconductor

Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Takao Yonehara, Sunnyvale, CA (US);

Karl J. Armstrong, Sunnyvale, CA (US);

Fatih Mert Ozkeskin, Union City, CA (US);

Assignee:

APPLIED MATERIALS, INC., Santa Clara, CA (US);

Attorney:

Patterson & Sheridan, LLP

Primary Examiner:

Mark A Osele

Assistant Examiner:

Nickolas Harm

Int. Cl.
CPC ...
B32B 38/10 (2006.01); C30B 33/00 (2006.01); C30B 25/02 (2006.01); H01L 21/677 (2006.01); H01L 21/304 (2006.01); H01L 21/306 (2006.01); B32B 43/00 (2006.01); H01L 21/673 (2006.01); H01L 21/683 (2006.01); H01L 21/67 (2006.01); H01L 21/687 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
C30B 33/00 (2013.01); C30B 25/02 (2013.01); H01L 21/02005 (2013.01); H01L 21/304 (2013.01); H01L 21/306 (2013.01); H01L 21/6776 (2013.01); B32B 38/10 (2013.01); B32B 43/006 (2013.01); H01L 21/02513 (2013.01); H01L 21/02658 (2013.01); H01L 21/67092 (2013.01); H01L 21/67383 (2013.01); H01L 21/6838 (2013.01); H01L 21/68721 (2013.01); H01L 21/68764 (2013.01); H01L 2221/683 (2013.01); H01L 2221/68318 (2013.01); H01L 2221/68363 (2013.01); Y10T 156/1121 (2015.01); Y10T 156/1132 (2015.01); Y10T 156/19 (2015.01); Y10T 156/1922 (2015.01); Y10T 156/1944 (2015.01);
Abstract

Method and apparatus for forming free-standing, substantially monocrystalline semiconductor substrates is described. A template substrate is subjected to a process of forming a porous layer on each major surface of the template substrate. The porous layer is smoothed, and then an epitaxial layer is formed on each porous layer. Mechanical energy is used to separate the epitaxial layers from the template substrate, which is recycled by removing any remaining porous and epitaxial material.

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Yonehara, Takao. (2016). Methods and apparatus for forming semiconductor (U.S. Patent No. 9523158). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9523158

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