The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 13, 2016

Filed:

Jul. 20, 2015
Applicant:

SK Hynix Inc., Icheon-si Gyeonggi-do, KR;

Inventors:

Jung Ryul Ahn, Namyangju-si, KR;

Yun Kyoung Lee, Seoul, KR;

Assignee:

SK HYNIX INC., Icheon-Si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/3205 (2006.01); H01L 27/115 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11556 (2013.01); H01L 27/11551 (2013.01); H01L 27/11578 (2013.01); H01L 27/11582 (2013.01); H01L 21/823487 (2013.01);
Abstract

A semiconductor memory device includes: a plurality of first channel columns including a plurality of first channel layers that are arranged in a direction and offset by their centers; a plurality of second channel columns alternately arranged with the plurality of first channel columns and having a plurality of second channel layers that are arranged in the direction and offset by their centers; first insulating layers and first conductive layers alternately stacked to surround the first channel layers; second insulating layers and second conductive layers stacked to surround the second channel layers; and spacers placed between the first channel columns and the second channel columns and interposed between the first conductive layers and the second conductive layers.


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