The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 13, 2016

Filed:

Dec. 22, 2015
Applicants:

Commissariat a L'energie Atomique ET Aux Energies Alternatives, Paris, FR;

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Francois Andrieu, Saint Ismier, FR;

Nicolas Degors, Le Versoud, FR;

Pierre Perreau, Grenoble, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/84 (2006.01); H01L 27/12 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
H01L 21/84 (2013.01); H01L 27/1203 (2013.01); H01L 21/823412 (2013.01); H01L 21/823462 (2013.01);
Abstract

There is provided a method for the manufacture of an integrated circuit, including a substrate and an insulating layer formed on the substrate; a first pMOS transistor formed on the insulating layer and including a channel formed in a first layer of a silicon—germanium alloy, having a first thickness and first average germanium density; a gate oxide layer having a first equivalent oxide thickness; a second pMOS transistor formed on the insulating layer and further including a channel formed in a second layer of a silicon—germanium alloy, having a second thickness which is greater than the first and a second average germanium density which is lower than the first; and a gate oxide layer having a second equivalent oxide thickness which is greater than the first.


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