The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 2016

Filed:

Dec. 28, 2011
Applicants:

Ramanand Venkata, San Francisco, CA (US);

Henry Y. Lui, Millbrae, CA (US);

Victor Maruri, Mountain View, CA (US);

David W. Mendel, Sunnyvale, CA (US);

Andrew Bellis, Guildford, GB;

Inventors:

Ramanand Venkata, San Francisco, CA (US);

Henry Y. Lui, Millbrae, CA (US);

Victor Maruri, Mountain View, CA (US);

David W. Mendel, Sunnyvale, CA (US);

Andrew Bellis, Guildford, GB;

Assignee:

Altera Corporation, San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/177 (2006.01); G06F 1/00 (2006.01); G06F 1/04 (2006.01); G06F 15/16 (2006.01); H04L 12/24 (2006.01); G06F 1/10 (2006.01); G06F 17/50 (2006.01); G06F 9/445 (2006.01);
U.S. Cl.
CPC ...
H04L 41/0816 (2013.01); G06F 1/10 (2013.01); H04L 41/0813 (2013.01); G06F 1/04 (2013.01); G06F 9/44505 (2013.01); G06F 17/5054 (2013.01);
Abstract

An integrated circuit device may include processing circuits that can be dynamically reconfigured to perform different tasks each of which utilizes different system clock resources. The device may include clock selection circuitry that can selectively route desired clock signals to corresponding processing circuits. The clock signal provided to each processing circuit may be selected based on a current configuration of that processing circuit. Client processing circuits in a network switch may be coupled to interchangeable client networks. The client processing circuits may be dynamically reconfigured based on characteristics of the client networks that are currently coupled to the network switch. By dynamically selecting which clock resources are provided to the processing circuits, clock resources such as global clock signals that are relatively scarce may be reserved for processing circuits that can only function with the relatively scarce clock resources. Arranged in this way, clock resource utilization may be continuously optimized.


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