The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 06, 2016
Filed:
Dec. 18, 2014
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Hongtao Xu, Portland, OR (US);
Georgios Palaskas, Portland, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 3/68 (2006.01); H01L 27/02 (2006.01); H01L 21/768 (2006.01); H03F 3/193 (2006.01); H03F 3/21 (2006.01); H03F 3/213 (2006.01); H03F 3/45 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0207 (2013.01); H01L 21/76895 (2013.01); H03F 3/193 (2013.01); H03F 3/211 (2013.01); H03F 3/213 (2013.01); H03F 3/45179 (2013.01); H03F 2200/294 (2013.01); H03F 2200/451 (2013.01); H03F 2203/21142 (2013.01);
Abstract
Apparatus having structures implementing compact and symmetric multi-way transformer combiners are described herein. In an embodiment, each unit device cell of a plurality unit device cells may include two metal layers on top of the unit device cell coupled to a multi-way transformer combiner by one of the two metal layers such that the configuration of the unit device cells with the multi-way transformer combiner is symmetric. Additional apparatus, systems, and methods are disclosed.