The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 06, 2016
Filed:
Oct. 13, 2015
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Chih-Wei Kuo, Tainan, TW;
Yuan-Shun Chao, Zhubei, TW;
Hou-Yu Chen, Zhubei, TW;
Shyh-Horng Yang, Hsinchu, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsin-Chu, TW;
Abstract
A FinFET device and a method for fabricating a FinFET device are disclosed. An exemplary method of fabricating a FINFET device includes providing a substrate including a fin structure including a plurality of fins and shallow trench isolation (STI) features between each fin of the fin structure. A first gate structure is formed over the fin structure. First gate spacers are formed on sidewalls of the first gate structure. The first gate spacers are removed while leaving portions of the first gate spacers within corners where the fin structure and the first gate structure meet. Second gate spacers are formed on sidewalls of the first gate structure. A dielectric layer is formed over the fin structure, the first gate structure, and the second gate spacers. The first gate structure and the portions of the first gate spacers are removed, thereby exposing sidewalls of the second gate spacers. A second gate structure is formed over the fin structure in a region where the first gate structure and the portions of the first gate spacers have been removed.