The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 2016

Filed:

Mar. 28, 2016
Applicant:

Asm Ip Holding B.v., Almere, NL;

Inventors:

John Tolle, Gilbert, AZ (US);

Matthew G. Goodman, Chandler, AZ (US);

Robert Michael Vyne, Gilbert, AZ (US);

Eric R. Hill, Goodyear, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/32 (2006.01); H01L 21/3205 (2006.01); H01L 21/324 (2006.01); H01L 21/311 (2006.01); B08B 5/00 (2006.01); B08B 7/00 (2006.01); C30B 23/02 (2006.01); C30B 25/18 (2006.01); C30B 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02049 (2013.01); B08B 5/00 (2013.01); B08B 7/0014 (2013.01); B08B 7/0071 (2013.01); C30B 23/025 (2013.01); C30B 25/186 (2013.01); C30B 29/06 (2013.01); H01L 21/0217 (2013.01); H01L 21/02046 (2013.01); H01L 21/02068 (2013.01); H01L 21/02301 (2013.01); H01L 21/02348 (2013.01); H01L 21/02532 (2013.01); H01L 21/02598 (2013.01); H01L 21/02636 (2013.01); H01L 21/02661 (2013.01); H01L 21/31116 (2013.01); H01L 21/324 (2013.01); H01L 21/3205 (2013.01);
Abstract

A method for integrated circuit fabrication can include removing silicon oxide by a pre-clean process. The pre-clean process can include depositing a halogen-containing material on the surface of a substrate in a first reaction chamber, and transferring the substrate having the halogen-containing material to a second reaction chamber. Silicon oxide material can be removed from a surface of the substrate by sublimating the halogen-containing material in the second reaction chamber. A target material, such as a conductive material, may subsequently be deposited on the substrate surface in the second reaction chamber.

Published as:
EP2922083A2; US2015270122A1; KR20150109288A; TW201537638A; EP2922083A3; US9299557B2; US2016254137A1; US9514927B2; EP2922083B1; TWI641046B; KR102167162B1;

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