The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 06, 2016
Filed:
Jul. 08, 2013
Applicant:
Soitec, Crolles Cedex, FR;
Inventors:
Mariam Sadaka, Austin, TX (US);
Bernard Aspar, Saint-Ismier, FR;
Chrystelle Lagahe Blanchard, Crolles, FR;
Assignee:
SOITEC, Bernin, FR;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/14 (2006.01); B81C 1/00 (2006.01); H03H 9/10 (2006.01); B81B 7/00 (2006.01);
U.S. Cl.
CPC ...
B81C 1/00246 (2013.01); B81B 7/0006 (2013.01); B81C 1/00238 (2013.01); H03H 9/10 (2013.01); B81B 2201/0271 (2013.01); B81B 2207/015 (2013.01); B81C 2203/0735 (2013.01); B81C 2203/0792 (2013.01);
Abstract
Methods are used to form semiconductor devices that include an integrated circuit and a microelectromechanical system (MEMS) device operatively coupled with the integrated circuit. At least a portion of an integrated circuit may be fabricated on a surface of a substrate, and a MEMS device may be formed over the at least a portion of the integrated circuit. The MEMS device may be operatively coupled with the integrated circuit. Semiconductor structures and electronic devices including such structures are formed using such methods.