The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 29, 2016

Filed:

Oct. 26, 2015
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Philip Leland Hower, Concord, MA (US);

Sameer Pendharkar, Allen, TX (US);

Marie Denison, Plano, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/808 (2006.01); H01L 21/225 (2006.01); H01L 27/098 (2006.01); H01L 21/8232 (2006.01); H01L 29/06 (2006.01); H01L 21/266 (2006.01); H01L 29/36 (2006.01); H01L 29/10 (2006.01); H01L 21/32 (2006.01); H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
H01L 29/808 (2013.01); H01L 21/2253 (2013.01); H01L 21/266 (2013.01); H01L 21/32 (2013.01); H01L 21/8232 (2013.01); H01L 27/098 (2013.01); H01L 29/0634 (2013.01); H01L 29/0657 (2013.01); H01L 29/0843 (2013.01); H01L 29/1058 (2013.01); H01L 29/36 (2013.01); H01L 29/66901 (2013.01); H01L 29/063 (2013.01); H01L 29/0688 (2013.01); H01L 29/0692 (2013.01);
Abstract

An integrated circuit and method having a JFET with a buried drift layer and a buried channel in which the buried channel is formed by implanting through segmented implant areas so that the doping density of the buried channel is between 25 percent and 50 percent of the doping density of the buried drift layer.


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