The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 29, 2016
Filed:
Dec. 30, 2011
Dimitrios Ziakas, Hillsboro, OR (US);
Zhong-ning Cai, Lake Osewago, OR (US);
Dimitrios Ziakas, Hillsboro, OR (US);
Zhong-Ning Cai, Lake Osewago, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Systems and methods to implement a multi-level memory system having a volatile memory and a non-volatile memory are implemented. A home agent may control memory access to both a volatile main memory and a non-volatile second level memory. The second level memory may be inclusive of the main memory. In an embodiment, the home agent may be configured to manage the memory system in a low power state. In a low power state, the volatile memory may be shut down and the non-volatile memory utilized as the only local memory. In an embodiment, the home agent may be configured to manage error recovery for the main memory by recovering the data saved locally in the second level memory. In an embodiment, multiple cores may access the second level memory.